1. Field of the Invention
The present invention relates to a display device and a driving method of the display device, and particularly to a digital driving display device that makes gradation display by pulse width modulation, and a driving method of the display device.
2. Description of Related Art
When a case of three bits (eight gradation levels) is taken as an example, as shown in FIG. 1, a digital driving display device that makes gradation display by pulse width modulation (PWM) ideally uses a gradation display method for displaying eight gradation levels by setting a one-bit data of a 2.4 ms width, for example, as a unit and combining pieces of such unit data so as to correspond to each of a first gradation level to a seventh gradation level.
However, in this ideal gradation display method, seven pieces of data is used, which is too large a number. Therefore, in practice, a gradation display method is used in which as shown in FIG. 2, three pieces of data having a period length ratio of 1 (first bit):2 (second bit):4 (third bit) are prepared, and eight gradation levels are displayed by a combination of the three pieces of data.
A digital driving display device using the latter gradation display method will be described in the following with reference to FIG. 3. FIG. 3 is a timing chart showing a relation between signal outputs of sequential scanning in related ordinary digital driving and pixels in which to write data on a time scale. FIG. 3 shows a case of eight scanning lines for convenience of description.
As is clear from FIG. 3, a related ordinary digital driving display device uses a subfield driving method. Specifically, one frame (1 F) period is divided into subfields SF1, SF2, and SF3 corresponding to respective bits (a first bit, a second bit, and a third bit in this example) of display data defining a gradation level of a pixel and having period lengths corresponding to the weights of the corresponding bits, and a ratio of a driving on period or an off period to one frame is controlled stepwise by turning on or off an electrooptic element of the pixel according to the corresponding bit in each of the subfields SF1, SF2, and SF3. The data is written to the pixel by line-sequential scanning in each of the subfields SF1, SF2, and SF3.
FIG. 4 is a timing chart showing on a time scale a flow from sampling latching of display data transferred to the display device to then load latching of the display data to writing of the display data to signal lines. The digital driving display device using the subfield driving method writes data to pixels by line-sequential scanning in each subfield. Hence, the transfer rate (sampling time) of the display data transferred to the display device is highest on a low gradation level side, and the number of gradation levels is limited by the transfer rate of the minimum bit (first bit). It is therefore difficult to increase the number of gradation levels and sufficiently express a low gradation level side.
Thus, in the past, pixels are sorted into two groups of odd-numbered lines and even-numbered lines, while one frame is divided into 15 subframes, which are each a period corresponding to weight of the least significant bit of four-bit gradation data. Subfields as units of a period during which an electro-optic element is turned on or off are made to correspond to each of the groups of the odd-numbered lines and the even-numbered lines and assigned to respective bits of the gradation data. In addition, period lengths of the subfields are defined so as to correspond to weights of the assigned bits with subframes as units. Further, first periods of the subfields assigned to the groups of the odd-numbered lines and the even-numbered lines belong to subframes different from each other (see Japanese Patent Laid-open No. 2003-216106 referred as Patent Document 1, for example).